As compared with widely used amorphous silicon (a-Si), amorphous (non-crystalline), oxide semiconductors have high carrier mobility (also called as field-effect mobility, which may hereinafter be referred to simply as “mobility”), wide optical band gaps, and film formability at low temperatures, and therefore, have highly been expected to be applied for next generation displays, which are required to have large sizes, high resolution, and high-speed drives; resin substrates having low heat resistance; and others.
In the oxide semiconductors, amorphous oxide semiconductors consisting of indium, gallium, zinc and oxygen (In—Ga—Zn—O, which may hereinafter be referred to as “IGZO”) have preferably been used, in particular, because of their having extremely high carrier mobility. For example, non-patent literature documents 1 and 2 disclose thin film transistors (TFTs) in which a thin film of an oxide semiconductor having an In:Ga:Zn ratio equal to 1.1:1.1:0.9 (atomic % ratio) was used as a semiconductor layer (active layer).
When an oxide semiconductor is used as a semiconductor layer of a thin film transistor, the oxide semiconductor is required to have a high carrier concentration and a high mobility and excellent TFT switching properties (transistor characteristics or TFT characteristics). Specifically, the oxide semiconductor is required to have (1) a high on-state current (i.e., the maximum drain current when a positive voltage is applied to both a gate electrode and a drain electrode); (2) a low off-state current (i.e., a drain current when a negative voltage is applied to the gate electrode and a positive voltage is applied to the drain voltage, respectively); (3) a low S value (Subthreshold Swing, i.e., a gate voltage needed to increase the drain current by one digit); (4) a stable threshold value (i.e., a voltage at which the drain current starts to flow when a positive voltage is applied to the drain electrode and either a positive voltage or a negative voltage is applied to the gate voltage, which voltage may also be called as a threshold voltage) showing no change with time (which means that the threshold voltage is uniform in the substrate surface); and (5) a high mobility.
Furthermore, TFTs using an oxide semiconductor layer such as IGZO are required to have excellent resistance to stress such as voltage application and light irradiation (stress resistance). It is pointed out that, for example, when a voltage is continuously applied to the gate electrode or when light in a blue emitting band in which light absorption arises is continuously irradiated, electric charges are trapped on the boundary between the gate insulating film and the semiconductor layer of a thin film transistor, resulting in a variation of switching characteristics, such as a shift of the threshold voltage. In addition, for example, when a liquid crystal display panel is driven or when a negative bias is applied to the gate electrode to turn on a pixel, the TFT is irradiated with light leaked out from the liquid crystal cell, and this light gives stress to the TFT to cause deterioration in the characteristics. Indeed, when a thin film transistor is used, a variation of switching characteristics due to stress by voltage application causes deterioration of reliability in a display devices itself.
Similarly in an organic EL display panel, the semiconductor layer is irradiated with light leaked out from a light emission layer, and this light gives stress to the TFT to cause deterioration in the characteristics such as a variation of threshold voltage.
Such a shift of threshold voltage of the TFT deteriorates the reliability of display devices such as a liquid crystal display and an organic EL display. Therefore, an improvement in the stress resistance (a small variation before and after the stress tests) is eagerly desired.
In the course of fabrication process of a thin film transistor substrate having the oxide semiconductor thin film and a source-drain electrode on top of the thin film, the oxide semiconductor is further required to have high resistance to a wet etchant. Since different kinds of wet etchants are used in each processing steps of a TFT, the oxide semiconductor is specifically required to possess the following two characteristics.
(1) Excellent Solubility into a Wet Etchant for Processing the Oxide Semiconductor
It is required for the oxide semiconductor to be etched at an appropriate rate by an organic acid-based wet etchant such as oxalic acid which is used in processing oxide semiconductor films so that the oxide semiconductor is patterned without a residue.
(2) Insolubility into a Wet Etchant for the Source-Drain Electrodes
A source electrode and a drain electrode formed on top of the oxide semiconductor film are etched at an appropriate rate by an inorganic-based wet etchant including such as for example phosphoric acid, nitric acid, and acetic acid, used for processing the source and drain electrode interconnection films. It is required for a surface (a side of back channel) of the oxide semiconductor film not to be etched or damaged by the wet etchant so that the oxide semiconductor is not deteriorated in terms of the TFT characteristics and stress resistance.
While degree of etching (etching rate) is generally dependent of kind of wet etchant, the IGZO shows an excellent solubility to wet etchant such as oxalic acid, i.e., excellent in adaptability to wet etching process of the oxide semiconductor layer. The oxide semiconductor, however, also shows high solubility into inorganic acid-based wet etchants, and is extremely easily etched by the inorganic acid-based wet etchant solutions. If the IGZO film is dissolved in the wet etching process of the source-drain electrode, fabrication of TFT then becomes difficult, and the TFT characteristics are deteriorated. In other words, IGZO is inferior in terms of (B) the durability in a wet etchant for the source-drain electrode. In an attempt to solve the problem, use of an etchant (a mixed solution of NH4F and H2O2) which does not etch IGZO is under consideration. However, the wet etchant is unstable and shows a short life-time, and deteriorates the productivity.
The deterioration of TFT characteristics accompanying a wet etching of source-drain electrode in case (B) may be particularly observed in a TFT of back channel etch (BCE) structure.
There are two types in thin film transistors of bottom-gate structure comprising an oxide semiconductor; one is an etch stop (ESL) type with an etch stopper layer 9 as shown in FIG. 1A, while the other is a back channel etch (BCE) type without an etch stopper layer as shown in FIG. 1B. The same numbers are given to components which are common in both of the figures wherein 1 refers to a substrate, 2 a gate electrode, 3 a gate insulating film, 4 an oxide semiconductor layer, 5 a source-drain electrode, 6 a passivation film (an insulating film), 7 a contact hole, and 8 a transparent conductive film.
The etch stopper layer 9 shown in FIG. 1A is formed for the purpose of preventing deterioration of TFT characteristics by damaging the oxide semiconductor layer 4 in the course of etching the source-drain electrode 5. Excellent TFT characteristics are likely to be secured by the structure shown in FIG. 1A as it reduces damages on the surface of oxide semiconductor layer in the course of fabricating a source-drain electrode. An insulating film such as SiO2 is usually used for the etch stopper layer.
The TFT shown in FIG. 1B, on the other hand, is suited to simplify fabrication process because of absence of an etch stopper layer, and is thus superior in terms of productivity. It is possible to avoid damaging the oxide semiconductor layer 4 during the etching step even without the etch stopper layer by choosing fabrication process. For example, an etch stopper layer is not necessary when fabricating a source-drain electrode 5 by a lift-off method, as the oxide semiconductor layer 4 is not damaged. In such a case a BCE type transistor as shown in FIG. 1B is adopted. The BCE type transistor structure shown in FIG. 1B may also be employed when a wet etching solution that is particularly developed to secure excellent TFT characteristics without an etch stopper layer is used in the fabrication process.
From the point of view of reducing fabrication cost and simplifying the process it is recommended as described above to adopt a BCE-type transistor which does not require an etch stopper layer as illustrated in FIG. 1B. However, the aforementioned issue regarding wet etching is strongly concerned. On the other hand, even in an ESL-type transistor shown in FIG. 1A, the aforementioned issue may arise depending on kind of etch etchant solution used in the fabrication process.
Considering the problem, Patent Document 1 discloses a technology to enhance resistance to an inorganic-based wet etchant such as for example a mixed wet-etching solution of phosphoric acid, nitric acid, and acetic acid, used for processing the source and drain electrodes, and to inhibit a semiconductor layer from being eroded, by adding a predetermined amount of Sn to IGZO. Specifically, it is disclosed in an example of Table 2 in Patent Document 1 that undesirable deviation (or distribution) of TFT characteristics is suppressed in a BCE-type thin film transistor comprising a semiconductor layer in which atomic ratio of Sn relative to the total content of In, Ga, Zn, and Sn, is controlled in a range from 0.015 to 0.070 (from 1.5 to 7%). However, improving the stress resistance is not considered at all in Patent Document 1.